In a Makefile, is "VARIABLE = value" equal to "VARIABLE=value?

Question

Simple question but there are so many things to consider in make that it feels better if I ask this question:

Is VARIABLE = value equal to VARIABLE=value?

Answer 1

Yes, they're the same. Per the docs:

Whitespace around the variable name and immediately after the ‘=’ is ignored.

Answer 2

Just FYI, although VARIABLE := value is the same as VARIABLE:=value, but

VARIABLE:=$(undefined) value
# now VARIABLE is prepended with a space

is NOT. This is why the make's manual says "ignored immediately after equal sign".

Also, operator += always adds a space.