Improving performance of syntax match regular expression

Question

I'm improving the Verilog syntax by adding support for automatic folding. Initially I was doing the following:

syn region verilogFold start="\<task\>" end="\<endtask\>" transparent keepend fold

But because task is also used as a syntax keyword, no folds are detected. So, to avoid matching the task keyword I am now using:

syn region verilogFold start="\(^\s*task\)\@<=\s\+\w\+" end="\<endtask\>" transparent keepend fold

Unfortunately this results in a huge increase on the time vim takes to process each file.

Does anyone have any ideas on how this expression could be improved to result in better performance?

Answer 1

Yes, the positive lookbehind can be slow. In recent Vim 7.4 versions, you can limit the search to 4 bytes (via \@4<=), but I think in this case, it's better to remove the separate keyword definitions and instead color the region start and end via matchgroup:

syn region verilogFold matchgroup=verilogStatement start="\<task\>" end="\<endtask\>" transparent keepend fold

If this doesn't work, try removing the transparent attribute; I'm not sure whether that applies to matchgroup, but I guess not.