How to keep an extra space from breaking this Makefile?

Question

I am accustomed to GNU make ignoring extra whitespace within variables, so I was surprised by the following.

## Makefile ##
PKGS = FOO BAR

FOO_DIR = foo
BAR_DIR = bar 
#            ^-------- Extra space at end of line

include $(foreach pkg, $(PKGS), $($(pkg)_DIR)/comp.mk)

default:
    @echo "Hello world!"

If there is a space after BAR_DIR = bar, make fails with this error:

'make: *** bar: Is a directory.  Stop.'

I think I understand what's happening here - there is a space in the include file path so make thinks I want to include a directory, hence the error. If the space is removed, and files foo/comp.mk and bar/comp.mk exist, make will run without error.

My question is, is there some way to protect against an extra space causing this failure?

Answer 1

You can use strip to protect against that:

include $(foreach pkg, $(PKGS), $(strip $($(pkg)_DIR))/comp.mk)

For a similar reason, it's often wise to avoid spaces after commas when passing arguments to functions, including foreach.