Automatic generate target From Source List Make File

Question

I have this directory structure.

app/
   src
   include
   lib/
       src
   maincode/
           main.cc
           Makefile

I want to generate automatic target from the source list in makefile. So I don't have to write rule for each file.

Example

source=\
        ../src/a.cpp
        ../src/ab.cpp
        ../lib/src/b.cpp

I want to write rule like

%.o:%.cpp

so that I don't have to repeat rule for each file. How I can achieve this ?

Answer 1

Edit: the find command should be inside a shell variable

If you are using Linux, I think you can use:

SOURCES=$(shell find . -name *.cpp)
OBJECTS=$(SOURCES:%.cpp=%.o)

%.o: %.cpp
    <command to compile>