Are modern GPUs considered to be RISC based or CISC based?

Question

I'm trying to figure out if modern GPUs have a reduced instruction set, or a complex instruction set.

Wikipedia says that it's not the size of the instruction set, rather how many cycles it takes to complete an instruction.

In RISC processors, each instruction can be completed in one cycle.

In CISC processors, it takes several cycles to complete some instructions.

I'm trying to figure out what the case is for modern GPUs.

Answer 1

If you mean Nvidia then it's clearly RISC as its most GPUs don't even have integer division and modulo operations in hardware, only shifts, bitwise operations and 3 arithmetic operations (addition, subtraction, multiplication) are used to implement those 2. I can't find example but this question (modular arithmetic on the gpu) shows that mod uses

procedure which implements some sophisticated algorithm (about 50 instructions or even more)

Even NVVM (Nvidia virtual machine) language called PTX uses more operations some of which are "baked" into a bunch of simpler operations anyway after conversion to one of native languages (there are different versions of such languages because of nature of GPUs and their generations/families but those are just called SASS altogether).

You can see here all the available operations along with description on each which are yet very short and not very clear (especially if you don't have background in machine level programming like knowing that "scaled" means 1 left shifted to operand just as in x86's "FSCALE" or "Scale factor" etc.): https://docs.nvidia.com/cuda/cuda-binary-utilities/index.html#instruction-set-ref

If you mean AMDGPU then there is a lot of instructions and it's not so clear because some sources tell that they switched from VLIW to something just when Southern Islands GPUs were released.

Answer 2

RISC instruction set : the load/store unit is independent from other units so basically for loading and storing specific instruction are used

CISC insruction set : the ad/store unit in embedded in the instrction execution routine , therfore the instruction is more comlex than RISC instruction because CISC instruction beside the operation it will perform the load and store stage and this require more transistor logic to be used for one ibstruction